Verilog :: Hardware Description Languages
VHDL :: Hardware Description Languages

VHDL - This is the home page for a Freeware Verilog,VHDL and Analog Mixed Signal project (a.k.a. the V-2000 project, still in its infancy).

Aldec - HDL design entry and simulation software for programmable logic designers.

C Level Design - Offers a design and verification environment for C/C++ with synthesis to VHDL and Verilog code.

Calyptech Design Services - Offers ASIC and FPGA design and verification services, drivers and tools. Includes product and service overview and PDF detailed product specifications available.
Meta Description: [ Design Services for FPGA/ASIC, high speed PCB, RF/analog, embedded software and DSP. ]

CAST, Inc. - Provides a broad line of general purpose IP cores for electronic design (also called silicon intellectual property, SIP, or virtual components, VCs). Includes processors, bus and network interfaces, multimedia and encryption functions, serial communications, and peripheral controllers.
Meta Description: [ CAST provides a broad line of general purpose IP cores (also called virtual components or silicon intellectual property) for electronic design. ]

Doulos Ltd - Training and consultancy across Europe in VHDL, Verilog, SystemC, Perl and Tcl/Tk. Offers free resources for hardware designers.
Meta Description: [ VHDL, Verilog, SystemC, e, SystemVerilog, PSL, Handel-C, Perl, Tcl/Tk training and consultancy. ]

Esperan - VHDL, Verilog and FPGA training courses held in the US, Europe and the UK.
Meta Description: [ Worldwide VHDL and Verilog training consultants within the EDA methodology industry. Areas range from SystemC and PSL verification to PCB and ASIC design. ]

Exemplar Logic, Inc. - Provides LeonardoSpectrum which is a CPLD, FPGA and desktop ASIC synthesis solution.
Meta Description: [ Mentor Graphics FPGA/PLD Synthesis Design Task overview ]

Experimental Computing Laboratory - Includes papers, presentations, conference publications and SAVANT VHDL, a free VHDL analyser and simulator. From University of Cincinnati.

eXsultation - Specialize in full turn-key, customer facility training programs in VHDL, Verilog,C++ modeling, formal verification, and FPGA design.
Meta Description: [ eXsultation - VHDL, Verilog, SystemC, SystemVerilog Training Courses ]

Green Mountain - VHDL compilers and design environments, including Windows, DOS and Linux support.
Meta Description: [ Green Mountain Computing Systems, Inc. site includes a free VHDL tutorial, free VHDL evaluation software, and product information about its professional VHDL compilers for Linux and Windows. ]

iMODL - The iValidate toolset comprises ready-to-use functional verification tools and simulation models.
Meta Description: [ TransEDA has developed the definitive, World-leading code coverage tools for concurrent hardware description languages (Verilog and VHDL) ]

Nova Engineering - Megafunctions are modular, DSP algorithms and functional blocks for custom use in PLD or ASIC designs.

Sandstrom Engineering - HDL pre-synthesis tools which check code for synthesizability. Then suggest replacement code where problems are found.

Saros - Offering a full suite of VHDL and Verilog design tools, from design-entry, simulation and synthesis to verification and training.
Meta Description: [ Addressing the needs of the ASIC and FPGA community with a range of advanced tools for high level design, verification and synthesis using VHDL, Verilog and C ]

Sutherland HDL, Inc. - Provides Verilog HDL and Verilog PLI training workshops and consulting services.
Meta Description: [ Sutherland HDL training workshops on Verilog and SystemVerilog. Developed and presented by engineering experts. Emphasize on proper usage of HDLs for logic synthesis and design verification. ]

Symphony EDA - Offers a VHDL compiler/simulator with an integrated development environment. Supports VHDL'93, Vital, and SDF. Free command-line tools also available.
Meta Description: [ Symphony EDA Home. We are proud to announce the release of VHDL Simili a free VHDL Simulator. It supports VHDL'93, Vital, SDF, etc. Download NOW! ]

SynaptiCAD - Provides Verilog, VHDL, TDML, logic analyzer, pattern generator, and SPICE tools.
Meta Description: [ SynaptiCAD: EDA supplier for timing diagram editors, simulators, and VHDL and Verilog debug tools. ]

Synplicity - Logic synthesis and verification products for FPGA and ASIC designers.
Meta Description: [ Synplicity, Inc. is a supplier of design automation solutions used by the world's leading electronic products companies to create and verify electronic products built using programmable logic, ASICs and SoC integrated circuits. ]

The Hamburg VHDL Archive - A collection of public-domain or shareware, VHDL documentation, models, and tools.

Time Rover - Provides tools for aiding Verilog development. Including The Temporal Rover for automatic verification of protocols and Verilog Java PLI.

TimingTool - Online timing diagram editor - Free to use online timing diagram editor. Timing diagrams are saved in TDML format. Translators from TDML to DXF, VHDL, and Verilog are also supplied.
Meta Description: [ TimingTool diagram editor is free to use online. TimingTool application generates VHDL or Verilog test benches from timing diagrams. ]

Translogic - EASE and EALE provide HDL aware entry tools, both graphical and text based. Also providing Linux support.
Meta Description: [ HDL Works - Front-End HDL Entry Tools EASE and HDL Companion. ]

Verilog Dot Com - Verilog resources page. Includes FAQ, books and links. Also verilog aware Emacs add on.
Meta Description: [ Verilog.com: Home Page ]

Verilog-AMS - The Verilog-AMS Technical Subcommittee has been created with the charter to develop, update and promote analog and mixed signal extensions to the Verilog (IEEE-1364) language.

VIZEF - Provide graphical HDL tools for design and verification.